ASIC Verification Engineer

Job Description:

• Own ASIC verification of IP/Cluster for complicated designs in RTL.
• Work with HW architects and designers to make the right implementation choices.
• Interact with the Performance verification teams to augment verification through dynamic simulations and/or Formal verification techniques.
• You will work with the specifications and ensure functional and code coverage of all the RTL which you will verify.
• Partner with and enable FPGA and S/W teams to ensure that S/W is tested.
• Be involved with post-silicon verification and debug.

Qualification & Experience

• BS / MS or equivalent experience.
• 2+ years of design experience.
• Experience in ASIC verification of complex design units for at least one or two projects.
• Background with design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB).